A low-power high speed full adder cell using carbon nanotube field effect transistors

The adder circuit is basic component of arithmetic logic design and that the most important block processor architecture. Moreover, power consumption main concern for real-time digital systems. In recent times, carbon nanotube field effect transistors (CNTFET) used designs with high performance. A creative substitute highspeed, less power, small size in area CNTFET. This paper presents 1- bit full CNTFETs low Using computer aided (CAD) tool proposed 1-bit model simulated using 32 nm CNTFET technology, a voltage supply +0.9V. Performance comparisons between various existing have been made terms delay, delay product (PDP). CNFET also n-bit carry look (CLA) compare it to other CLAs evaluate performance reliability. simulation results shows consume than adders.